About me

I am a Staff Engineer at Samsung Electronics, specializing in the development of Processing-In-Memory (PIM) solutions. My academic background includes a Ph.D. in Electrical Engineering from KAIST, under the direction of Professor Minsoo Rhu, as well as a Master of Science from POSTECH, supervised by Professor Hanjun Kim, and a Bachelor of Science from POSTECH. My research expertise centers on system-level support for PIM architectures.

Work Experience

Samsung Electronics, Hwaseong, South Korea
- Staff Engineer [Mar. 2025 ~ Present]

Academic Service

External Reviewer
- IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS): 2025
Journal Reviewer
- ACM Transactions on Architecture and Code Optimization (TACO): 2025

Education

KAIST, Daejeon, South Korea [Aug. 2018 ~ Feb. 2025]
- Ph.D. in Electrical Engineering
POSTECH, Pohang, South Korea [Mar. 2017 ~ Aug. 2018]
- M.S. degree in Creative IT Engineering
- Representative of Master Graduates
- Thesis: Timing Analysis of CNN Inference on GPUs
- Advisor: Hanjun Kim
TU Berlin, Berlin, Germany [Feb. 2015 ~ Aug. 2015]
- Exchange student
POSTECH, Pohang, South Korea [Mar. 2012 ~ Aug. 2016]
- B.S. in Mechanical Engineering
- Graduate with Honors

Publications

Jeehyun Kim, Donghyeon Kim, Seokwon Kang, Bongjoon Hyun, Inho Lee, ****and Yongjun Park, “PIM-CCA: An Efficient PIM Architecture with Optimized Integration of Configurable Functional Units”, The 56th IEEE/ACM International Symposium on Microarchitecture (MICRO-58), Seoul, Korea, Oct. **2025